It is advantageous for many applications of semiconductor devices to arrange the needed devices in close proximity, even in a cluster. When only two, or few more, semiconductor chips are needed, various arrangements have been proposed in order to achieve the desired proximity, and to enable a minimization of required space. Typically, these arrangements are assemblies of semiconductor chips on a substrate, with or without a specific encapsulation. For these arrangements, the term "multichip module" is commonly used. For an encapsulated assembly, the term "multichip package" has been introduced. For many years, there has been a rather limited market for multichip modules and multichip packages, but driven by the rapidly expanding penetration of integrated circuit applications, this market is recently growing significantly in size. In order to participate in this market, though, the multichip products have to meet several conditions.
The multichip product has to offer the customer performance characteristics not available in single-chip products. This means, the multichip product has to leapfrog the development of single-chip product. PA1 The multichip product has to be available to the customer at short notice. This means, the multichip product should use readily available components and fabrication methods. PA1 The multichip product has to offer the customer a cost advantage. This means, the design and fabrication of the multichip product has to avoid unconventional or additional process steps. PA1 The multichip product has to offer low cost-of-ownership. This means, it has to operate reliably based on built-in reliability.
Numerous multichip packages have been described in publications and patents. For instance, U.S. Pat. No. 4,862,322, Aug. 29, 1989 (Bickford et al.) entitled "Double Electronic Device Structure having Beam Leads Solderlessly Bonded between Contact Locations on each Device and Projecting Outwardly from Therebetween" describes a structure of two chips facing each other, in which the input/output terminals are bonded by beam leads. The high cost, however, of materials, processing and controls never allowed the beam lead technology to become a mainstream fabrication method.
In U.S. Pat. No. 5,331,235, Jul. 19, 1994 (H. S. Chun) entitled "Multi-Chip Semiconductor Package", tape-automated bonding plastic tapes are used to interconnect two chips of identical types, facing each other, into pairs. One or more of these pairs are then assembled into an encapsulating package, in which the plastic tapes are connected to metallic leads reaching outside of the package to form the leads or pins for surface mount and board attach. The high cost of the plastic tapes and the lack of batch processing kept the technology of tape-automated bonding at the margins of the semiconductor production.
Several proposals have been made of multichip devices in which two or more chips are arranged side by side, attached to a supporting substrate or to leadframe pads. An example is U.S. Pat. No. 5,352,632, Oct. 4, 1994 (H. Sawaya) entitled "Multichip Packaged Semiconductor Device and Method for Manufacturing the Same". The chips, usually of different types, are first interconnected by flexible resin tapes and then sealed into a resin package. The tapes are attached to metallic leads which also protrude from the package for conventional surface mounting. Another example is U.S. Pat. No. 5,373,188, Dec. 13, 1994 (Michii et al.) entitled "Packaged Semiconductor Device including Multiple Semiconductor Chips and Cross-over Lead". The chips, usually of different types, are attached to leadframe chip pads; their input/output terminals are wire bonded to the inner lead of the leadframe. In addition, other leads are used under or over the semiconductor chips in order to interconnect terminals which cannot be reached by long-spanned wire bonding. Finally, the assembly is encapsulated in a plastic package. In both of these examples, the end products are large, since the chips are placed side by side. In contrast, today's applications require ever shrinking semiconductor products, and board consumption is to be minimized.
U.S. Pat. No. 5,438,224, Aug. 1, 1995 (Papageorge et al.) entitled "Integrated Circuit Package having a Face-to-Face IC Chip Arrangement" discloses an integrated circuit (IC) package with a stacked IC chip arrangement placed on a circuit substrate. Two chips are positioned face to face, with a substrate made of tape-automated bonding tape or flex circuit interposed between the chips to provide electrical connection among the terminals of the flip chip and external circuitry; a separate mechanical support is needed for the assembly. in addition to this cost, fabrication is difficult due to the lack of rigid support for the chips.
U.S. Pat. No. 5,770,480, Jun. 23, 1998 (Ma et al.) entitled "Method of Leads between Chips Assembly" increases the IC density by teaching the use of leadframe fingers to attach to the bond pads of multiple chips employing solder or conductive bumps. While in the preferred embodiments both chips of a set are identical in function, the method extends also to chips with differing bond pad arrangements, In this case, however, the leadframe needs customized configuration and non-uniform lengths of the lead fingers, especially since the use of bond wires is excluded. The manufacture of these so-called variable-leads-between-chips involves costly leadframe fabrication equipment and techniques. In addition, a passivation layer is required, to be disposed between the two chips and the customized lead fingers, in order to prevent potential electrical shorts, adding more material and processing costs.
An urgent need has therefore arisen for a coherent, low-cost method of fabricating multichip packages based on available chip designs and assembly and encapsulation techniques. The method should be flexible enough to be applied for different semiconductor product families and a wide spectrum of design and process variations, should add no additional cost to the existing fabrication methods, and deliver high-quality and high-reliability products. Preferably, these innovations should be accomplished while shortening production cycle time and increasing throughput.